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CM and LAN9514

Posted: Thu Dec 11, 2014 12:48 pm
by IgorEE
Hi,

I am trying to make my own board to host the CM, and I would like to use the LAN9514 as on the RPi Model B+. I have read all threads on the subject on this forum, and I would like to share my schematic (attached).

I would appreciate it if someone has the time to have a look over and point out any problems. In particular, I have the following concerns:

1. LAN9514 is clocked by RPi GPIO 44, do I need an inline resistor between the GPIO44 pin and the XI pin of the Pi?
2. Does this clock line need to be routed with a specific impedance to ground?
3. How does RPi B+ handle the power control to downstream devices. I see a few ICs on the B+ near the LAN9514 and I assume these are the power management switches, however I can not determine which ICs they are exactly and in what configuration. I see there looks to be a SOT23-6 a SOT23-3 and something else, labelled U13, Q4 and D3, so obviously an IC, diode and a transistor, but how are they connected and are they all for port power management?

Thank you!
-Igor
p.s. Can not attach file, but you can see it at the following link:
LAN9514 Schematic

Re: CM and LAN9514

Posted: Thu Dec 11, 2014 5:17 pm
by arm2
The B+ schematics should answer most or all of you questions.
http://www.raspberrypi.org/documentatio ... /README.md

Re: CM and LAN9514

Posted: Thu Dec 11, 2014 6:11 pm
by IgorEE
Arm2,

The full B+ schematics have not been released and the page of the schematic that has been released does not address any of the mentioned issues.

-Igor

Re: CM and LAN9514

Posted: Thu Dec 11, 2014 11:39 pm
by mahjongg
IgorEE wrote: 1. LAN9514 is clocked by RPi GPIO 44, do I need an inline resistor between the GPIO44 pin and the XI pin of the Pi?
You mean XI pin of the LAN9514. Yes, a 33 Ohm resistor R54 is placed near the SoC, and a 100K pulldown R31 is placed near the LAN9612.
2. Does this clock line need to be routed with a specific impedance to ground?
The schematic has no instructions one way or another, for this 25MHz signal, so I don't think so.
3. How does RPi B+ handle the power control to downstream devices. I see a few ICs on the B+ near the LAN9514 and I assume these are the power management switches, however I can not determine which ICs they are exactly and in what configuration. I see there looks to be a SOT23-6 a SOT23-3 and something else, labelled U13, Q4 and D3, so obviously an IC, diode and a transistor, but how are they connected and are they all for port power management?
For USB current limitation (of all four sockets) a AP2553W6 (U13) is used, with some trickery so that with one GPIO of the LAN9514 you can either read a bus FAULT or disable the AP2553W6. basically its a 100K resistor and halve a BAV99 (D3) in parallel between the enable input and the fault output. the LAN9514 GPIO used is pin 14, a 1K8 pullups R48 is also used.

no special IC is used for HDMI power management, just a few FET's and an ESD protection IC.

Re: CM and LAN9514

Posted: Fri Dec 12, 2014 11:35 am
by IgorEE
Hi mahjongg,

That was very helpful, especially for the info about the 33Ohm 100k pulldown for the XI pin of the LAN9514. Thank you.

With your information and buzzing out the B+ board I came out with the following circuit:
USB Power Management

Does that seem right? The question still remains though, what is Q4 and why is it connected to a pin on the main SoC?

More importantly, I imagine this has been done reduce cost, is there any reason why there would be problems if I implement USB power management using dedicated current limiter ICs as shown in the LAN9514 reference design?

Re: CM and LAN9514

Posted: Fri Dec 12, 2014 4:52 pm
by Burngate
Seems very similar to mine - apart from having the diode the right way round. Sorry about that - I'll alter mine for next time.
http://www.raspberrypi.org/forums/viewt ... 81#p624881
Q4 is to change the current limit from 600mA to 1200mA - see the AP2553 datasheet. it's driven from GPIO-38

My drawing says the chip is driven from PRT_CTRL_2 rather than 1.

Re: CM and LAN9514

Posted: Fri Dec 12, 2014 5:18 pm
by gsh
The reason why the rest of that stuff is there is to improve the characteristics of the LAN9514 power control switching... Basically it tends to behave somewhat erratically when hitting the current limit, so we use an RC time constant to hold the power off while linux detects the overcurrent condition and turns off the port.

So you are OK to remove Q4 and use a fixed current limit, but the rest of the circuitry is to avoid the poor switching behaviour of the 9514. But if you don't much care about that then just use the app note layout

Gordon

Re: CM and LAN9514

Posted: Sun Dec 14, 2014 7:45 pm
by IgorEE
Hi gsh,

Thanks for the helpful info.

I have a final schematic which can be viewed here.

It doesn't show an inline 33ohm resistor which is on GPIO44 (CLOCK) close to the CM.

If anyone who has time to have a look and notices anything off please let me know as I will commit this to manufacture in a few days.

Thanks!
-Igor

Re: CM and LAN9514

Posted: Sun Dec 14, 2014 9:02 pm
by gsh
The inline 33ohm is a source clock termination for the clock line, since it's 25MHz it'll definitely improve the signal integrity of the clock.

Gordon

Re: CM and LAN9514

Posted: Mon Dec 15, 2014 12:30 pm
by arm2
Any news on when the full B+ schematics will be released?

Re: CM and LAN9514

Posted: Mon Dec 15, 2014 1:06 pm
by jamesh
arm2 wrote:Any news on when the full B+ schematics will be released?
News is released on the blog - if it hasn't appeared there, then it hasn't appeared at all. This usually include date for when stuff will be happening, but as you know, the Foundation usually keeps stuff quiet until release.

But, I'll ask and see if there are any schedules. Whether I'll then be able to publish anything? Who knows.

Re: CM and LAN9514

Posted: Mon Dec 15, 2014 6:42 pm
by IgorEE
Thanks Gordon,

I have included the 33ohm resistor, but it is on another schematic sheet (with the CM and other stuff) so it doesn't show in the page I posted above.

Any other potential problems anyone has spotted?

Thanks!
-Igor

Re: CM and LAN9514

Posted: Thu Dec 18, 2014 12:04 pm
by IgorEE
Another quick question,

GPIO44 is the clock for the LAN9514 and it is connected to XI pin of the LAN9514. This signal also has a 33ohm resistor between the CM and the XI on LAN9514, it is pulled down by a 100k resistor near the XI pin of the LAN9514, but does it need another 100k pulldown near the CM as well? It is pulled down on the IO board schematics near the CM and the design document required it, but since it is pulled low near the LAN9514, does it need another pulldown near the CM?

Cheers,
-Igor

Re: CM and LAN9514

Posted: Thu Dec 18, 2014 12:10 pm
by gsh
No you don't require an extra pull down. The reason you've got the pull down is because GPIO44 is one of the ones that has no default pull on it (you can see these in the 2835 arm peripherals datasheet page 102-103)

Gordon

Re: CM and LAN9514

Posted: Sat Jan 24, 2015 6:46 pm
by IgorEE
Hi,

I've gotten a board with LAN9514 manufactured and I'm currently booting the compute module successfully, but unfortunately I have no USB not Ethernet - as a matter of fact the LAN9514 is not getting recognized at all. Now this might be due to a number of things, including design and/or assembly of the board (hand assembled), so I'm going to address one issue here.

I probed GPIO44 of the raspberry Pi compute module which should be the 25MHz clock for the LAN9514 controller, and GPIO44 is not clocking - it is low. So, I imagine I need to get the compute module to output a clock on this pin, otherwise the LAN9514 is not being clocked and not doing anything, so my question is how do I get the compute module to output a 25MHz clock on GPIO44? I guess there is some config somewhere, but I am unable to figure out where and how. Any help appreciated!

Here is the output of "dmesg | grep smsc"

Code: Select all

dmesg | grep smsc 
[    0.000000] Kernel command line: dma.dmachans=0x7f35 bcm2708_fb.fbwidth=656 bcm2708_fb.fbheight=416 bcm2708.boardrev=0x11 bcm2708.serial=0x1d81d78d .[01;31m.[Ksmsc.[m.[K95xx.macaddr=B8:27:EB:81:D7:8D bcm2708_fb.fbswap=1 sdhci-bcm2708.emmc_clock_freq=250000000 vc_mem.mem_base=0x1fa00000 vc_mem.mem_size=0x20000000  dwc_otg.lpm_enable=0 console=ttyAMA0,115200 console=tty1 root=/dev/mmcblk0p2 rootfstype=ext4 elevator=deadline rootwait
[    1.406056] usbcore: registered new interface driver .[01;31m.[Ksmsc.[m.[K95xx
I have also checked the GPIO44 on a different compute module placed on the IO board, and it is not clocking either, which makes me think there is a configuration for this that needs to be set. I can see a 25MHz clock on a standard model B+ on GPIO44.

Thanks in advance,
-Igor

Re: CM and LAN9514

Posted: Mon Jan 26, 2015 5:39 pm
by IgorEE
It seems we've managed to get the CM and LAN9514 working correctly the same way they are on the model B+. We needed to output a 25MHz clock on the GPIO44, and all the information on how to do this can be found at the following link:
https://github.com/raspberrypi/document ... uration.md
for anyone having the same issues.

Cheers,
-Igor

Re: CM and LAN9514

Posted: Sun Feb 15, 2015 4:31 am
by jianlong
I have a final schematic which can be viewed herehttps://drive.google.com/file/d/0B0QS1n ... p=sharing.
Hi Igor,
Thank you for your post about the CM and LAN9514 schematic. I have a project just like yours. Did you using the posted schematic above and working great?

Re: CM and LAN9514

Posted: Sun Feb 15, 2015 8:00 am
by gsh
Igor,

What does your dts file look like?

Gordon

Re: CM and LAN9514

Posted: Tue Feb 24, 2015 1:43 pm
by amk
Nice topic, doing the same over here, will combine the LAN9514 with PoE for powering my application.

Re: CM and LAN9514

Posted: Thu Feb 26, 2015 6:04 pm
by arm2
Is there an ETA when the full B+ schematics will be released?

I realise you've all been rather busy!

Hopefully the Pi2 schematics will follow but I think most/all the information needed will be in the B+ schematics.

Re: CM and LAN9514

Posted: Mon Mar 02, 2015 9:41 pm
by gsh
We may never publish the Pis schematics

Re: CM and LAN9514

Posted: Tue Apr 14, 2015 7:06 am
by amk
I have got my hardware up and running, using a separate clock crystal for the LAN9514. However I noticed the RPI model B+ uses the SoC to generate this signal. To save on BOM cost I would like to use this option as well. The problem however is there is no 25MHz clock signal on GPIO44. What should I do to make the signal to became active?

Re: CM and LAN9514

Posted: Tue Apr 14, 2015 8:16 am
by gsh
If you have a look at the dt-blob.dts from https://www.raspberrypi.org/documentati ... uration.md (it's linked to at the bottom of the page) you should see the following lines:

Code: Select all

                  pin@p44 { function = "gp_clk"; termination = "pull_down"; }; // Ethernet 25MHz output
                  pin@p31 { function = "output"; termination = "pull_down"; }; // LAN NRESET

                  pin_define@LAN_RESET {
                     type = "internal";
                     number = <31>;
                  };

I'm fairly sure those are the main items...

Gordon

Re: CM and LAN9514

Posted: Tue Apr 14, 2015 1:44 pm
by amk
Got it working, besides the pin definitions you also have to add the clock configuration code to the .dts file.

Can someone comment on the use of the LAN reset signal? Without the use of this signal the LAN9514 also seem to work fine.

Re: CM and LAN9514

Posted: Tue Apr 14, 2015 2:06 pm
by gsh
Yeah, it's just at boot up the LAN device is reset... It's actually not _that_ important and mostly just a hang over from early Raspberry Pi's

Gordon