blm768
Posts: 24
Joined: Sun Nov 18, 2012 6:13 am

Understanding the system timer

Tue Nov 27, 2012 9:15 am

I've been trying to decipher the documentation on the system timer, and it seems rather sparse. I can't figure out where to enable the system timer interrupt; there aren't any bits marked as being related to system timer interrupts in the IRQ enable registers or in the system timer registers. I'm assuming that the system timer interrupt is always enabled (as long as IRQs are enabled) and that I only need to set bits in the system timer control register to acknowledge the timer. Is this correct, or am I missing something?

dwelch67
Posts: 954
Joined: Sat May 26, 2012 5:32 pm

Re: Understanding the system timer

Tue Nov 27, 2012 2:53 pm

I am pretty sure the match flags interrupts are not enabled all the time. I would assume they are tied to the interrupt controller but without being enabled there enabling arm interrupts you wont see them. It is easy to poll the interrupt controller to find bits that are changing state, find the ones that match the counter match flag. From there you enable it/them into the arm and then the arm can handle the interrupt.

I am curious, maybe I will do my own example of this. Also curious to see if the GPU is using this timer, if so based on what the docs say I would monitor the match registers if they are changing then the gpu is doing it. and using them.

David

dwelch67
Posts: 954
Joined: Sat May 26, 2012 5:32 pm

Re: Understanding the system timer

Tue Nov 27, 2012 3:59 pm

quick update, working on an example

It appears to me that the gpu is using compare registers C0 and C2. (the gpu firmware I am using is weeks old, things can always change). Using my uart examples as a baseline I had a program print out the timer and the four compare registers. you can see the compare registers changing. as described in the manual the way to use these is to have the isr move the compare register value out in front of the timer. the polling and printing through the uart is quite slow compare do the timer but it is enough to see that when the timer passes the compare register the compare register moves forward for these two, the gpu must be doing this.

as implied in the manual there is no enable control in the system timer itself, the status bits are then assumed to be tied directly to interrupts. which interrupts? by changing the program to enable all interrupts (write 0xFFFFFFFF to 0x210 and 0x214), have some code read the current time, add some (I added 0x00400000) and write that to the compare register 1 and/or compare register 3, then go into an infinite loop printing out the pending status registers (0x204 and 0x208) you see that compare 1 is tied to irq 1 and compare 3 tied to irq3 (bits 1 and 3 in 0x204).

The last step is clearing the interrupt, the docs say to write a one to the status register to clear, if you do this, and then read back both the status register and the interrupt status you see the flag and the interrupt do clear with a write of a 1. I had triggered both c1 and c3 interrupts but only wrote to one of the flag bits (wrote a 2) only that one interrupt cleared. so it seems that the write 1 to clear in the docs is correct.

David

blm768
Posts: 24
Joined: Sun Nov 18, 2012 6:13 am

Re: Understanding the system timer

Tue Nov 27, 2012 4:46 pm

Hmm... That seems to make sense. I'll have to try that.

One of these days, I'll need to get my graphics code working. I don't have any cables for the GPIO headers, so I'm just using the OK LED. What I could really use is a JTAG interface; I might have to look at getting one.

One thing that worries me is that the datasheet warns against enabling any IRQs that aren't labeled on its chart, but I guess the timer interrupts are probably safe if Linux is using them.

tufty
Posts: 1456
Joined: Sun Sep 11, 2011 2:32 pm

Re: Understanding the system timer

Tue Nov 27, 2012 4:49 pm

ISTR reading that 2 of the timer interrupts were used by the GPU, and 2 were free. Which ones, though, escapes me for the moment.

dwelch67
Posts: 954
Joined: Sat May 26, 2012 5:32 pm

Re: Understanding the system timer

Tue Nov 27, 2012 6:02 pm

Unfortunately with this documentation you have to hack your way through things. If I blow up a board by enabling all interrupts, well, I will just buy another I guess.

Is linux really using those timer interrupts? I would assume it is using the other timers and staying away from the system timer? If linux is using them then that would imply the information (interrupt number, etc) is "documented" in the linux code.

Jtag works nicely...other than some soldering is required or cutting apart a cable to get at one of the signals (supposedly fixed in the next rev of the board), and the gpio lines do not power up connected to jtag you have to run some software to route the I/O to jtag. I have a bootloader that enables the arm jtag (sets the alternate function on the gpio lines so they tie to the arm debug tap) and then goes into an infinite loop for you to take over from jtag.

It would be nice/wise if the gpu bootloader routed the gpio signals and released reset on the arm, perhaps a config.txt option that does that. 1) route the gpio signals to arm jtag 2) write an infinite loop instruction in arm address space for address 0 (zero) 3) release reset on the arm.

David

blm768
Posts: 24
Joined: Sun Nov 18, 2012 6:13 am

Re: Understanding the system timer

Tue Nov 27, 2012 6:28 pm

dwelch67 wrote: Is linux really using those timer interrupts? I would assume it is using the other timers and staying away from the system timer? If linux is using them then that would imply the information (interrupt number, etc) is "documented" in the linux code.
IIRC, one of the other threads mentioned that Linux uses the system timer because the ARM timer doesn't have a constant speed. Of course, that isn't necessarily correct.

I tried poking through the Linux code, but I got lost in the millions of lines and gave up. Linux code has too many internal dependencies for my liking. :)

dwelch67
Posts: 954
Joined: Sat May 26, 2012 5:32 pm

Re: Understanding the system timer

Tue Nov 27, 2012 10:14 pm

github.com/dwelch67/raspberrypi just added blinker07 which demonstrates a system timer ARM interrupt with bare metal.

David

gertk
Posts: 52
Joined: Mon Aug 29, 2011 9:08 am

Re: Understanding the system timer

Wed Nov 28, 2012 6:50 am

Any ideas what the GPU is using the timer for ? (video timing ?)

tufty
Posts: 1456
Joined: Sun Sep 11, 2011 2:32 pm

Re: Understanding the system timer

Wed Nov 28, 2012 8:47 am

There you go : http://www.raspberrypi.org/phpBB3/viewt ... 72&t=17855

System timer compare 0 and 2 used by the GPU, 1 and 3 are yours to have and to hold.

From that thread
dom wrote:
rupertr wrote:Awesome, that explains that, thanks dom!
Don't suppose you could enlighten us a little further as to what the GPU is using them for? Just curious :)
Timer 0 is used for the GPU RTOS (threadx) as the timer tick (100 interrupts / second).
Timer 2 is used for lightweight timers than can call callbacks with microsecond (*) resolution.

(*) subject to inetrrupt latency.

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