MarkTF
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Re: RISC-V

Mon Jan 07, 2019 3:31 pm

Gavinmc42 wrote:
Mon Jan 07, 2019 7:53 am

RISC-V? DIY cpus for kids?
Will a 6502 fit?
All those retro cpus, number of transistors = ? number of LUTs
https://en.wikipedia.org/wiki/Transistor_count.
RISC-V is 10,000 -20,000 transistors?
This FPGA could do a up to a Z80?
There exist published open source FPGA core designs for a great many processor architectures: https://opencores.org/projects?expanded=Processor

Heater
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Re: RISC-V

Mon Jan 07, 2019 3:38 pm

jamesh,

I agree. Clearly we cannot say "ARM does not work". It's a processor core, of course it works. Corporations will go for cost reduction. That is what engineering is all about as well.
My question of above was for use cases where ARM/x86 DONT work, not where there *might* be a cheaper option.
I believe there is an ocean of smaller companies with ideas that need a SoC and a CPU core. If they don't have an ARM license already or if they want to tweak the CPU some how, then picking up a RISC V core is going to be the cheaper, quicker option. The Kendryte K210 is such an example.

SciFive is certainly staking it's business on that idea. As are the LowFive guys as far as I can tell.

But this need not be at the low end of micro-controllers and "IoT" stuff. I can imagine the like of Google could get into this for server end and AI things.

x86 of course does not work in this space at all. You cannot even get a license to use and abuse it. If whatever chips Intel has don't fit your needs then they are of no use.

Then there is politics. Most of the world does not want to be beholden to Intel in the USA or ARM Japan or anyone anywhere for that matter.

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Re: RISC-V

Mon Jan 07, 2019 3:48 pm

MarkTF,
There exist published open source FPGA core designs for a great many processor architectures:...
Indeed. There have been such cores for many years.

The deal is, do they have "community" support?

Do they have GCC and LLVM compiler support?

Are all the many other tools available?

Are there many different implementations from small to large?

Does RedHat, Debian and others support their OS on them?

When it comes down to it, the actual Verilog or VHDL on opencores.org or where ever does not matter. What matters is everything else you need.

It's kind of like how the Raspberry Pi would have been a non-starter if it could not leverage all the existing world of Linux and all the Free and Open Source software that runs on top of it.

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Re: RISC-V

Mon Jan 07, 2019 7:06 pm

As far as I can see the visible ISA is just the tip of the iceberg as far as the complexity of the CPU is concerned.

Behind the ISA is for example:- complex dynamic power management (for example powering off unused parts of registers), speculative execution, out of order execution, branch prediction, register renaming, etc etc etc the list goes on and on. Intel CPU's may have only 16 visible registers, but in reality there are hundreds behind the scenes (which is why instructions like "mov reg1,reg2" are simply removed).
Study the latest Intel chips and try to understand their mind boggling complexity. It is amazing what hardware can do. ARM are moving the same way.

But these companies have invested countless billions over decades.
Sure a company can produce a new RISC-V compliant processor probably fairly cheaply, but they will never be able to do all the above in the near future. I guess that is, in part, what you are paying for when buying Intel or ARM.

If SIMD is important, the RISC-V extension "V" barely describes anything. Then take a look at AVX512, a different world.
The point is, it took Intel decades to get that far. Even ARM's simple NEON and VFP were developed over a long time, they didn't magically appear overnight.

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Re: RISC-V

Mon Jan 07, 2019 9:04 pm

Indeed. Whilst its probably fairly easy to get a basic RISC-V core going, the extra work required to make it useful in many of the use cases people want, acheieving things like low power consumption, high processing performance, fast memory access (memory controller) etc does take a LOT of effort over and above just the instruction set. I'm sure the RISC-V people are looking in to this, and it will be done faster than Intel or ARM did it (prior experience helps!), it still won;t be quick. Then add on all the peripherals you find in an SoC, USB, ethernet, HDMI, I2C, etc, all of which need paying for unless you do it yourself,. Put it like this, the USB block on the Pi SoC was bought in by Broadcom, because it was cheaper that DIY...
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Re: RISC-V

Tue Jan 08, 2019 12:31 am

I don't think RPF have to worry about someone making a better Pi from a FPGA and a bunch of blocks from OpenCore.
But cool if someone did ;)
What is interesting me is the possibility of doing FGPA stuff on Pi's as well all the normal coding.
That IceStudio FPGA visual IDE worked on my Linux Mint, not sure why it does not on my Pi yet.

If that FPGA stuff includes cpu cores then a big bonus for learning how they are made.
Settle that argument which was better Z80 or 6809? :D
$1 FPGA's that can do cpu stuff :o $8 ones that can do neural network vision recog :shock:

As Donald Knuth wrote in one of his prefaces, (Art of Computer Programming - 4A) , "advances in computing are coming from algorithm improvements." x86, Arm, RISC-V they can all only go so fast.
RISC-V saves power and real estate so they can put more on the die but there is a limit.
Intel, IBM have learned the hard way, complexity can making debugging impossible.

Since Neural networks have been found to work with 8 bit data, perhaps we will see 10,000 core 8 bit cpus?
Who knows? The best AI cpu could be invented on a fpga programmed by a Pi.
Why stick with 8,16,32,64 bits cpu's, why not try 9bit trinary cpu's?

But for FPGA cpu RISC-V is a good place to start.
Distributed Processing, IoT style requires lots of cpus, orders of magnitudes more cpu's than we have on the planet now?
Can a cpu be made for $0.01?

Wow, semi rhetorical question, IBM down to 10cents :o
https://www.digitaltrends.com/computing ... uter-salt/
Wonder if they are RISC-V based?
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Re: RISC-V

Tue Jan 08, 2019 9:24 am

Heater wrote:
Fri Jan 04, 2019 6:58 pm
a) Instruction set diversity is a disaster. That implies a plethora of incompatible systems and a lot of work building tools for them all and porting software around, etc. That is why the modern world only has two instruction sets: Intel on PC and server, ARM on mobile and embedded.
Also the server market is embracing more and more the ARM architecture. There's so many efforts with it, that it could mean the ARM will drive out Intel CPUs there sooner or later. (Also, isn't Apple thinking loud about using ARM for their next generation Macos-X desktop machines?)

Huawei announces Kunpeng 920 as "Highest Performance ARM CPU" (Phoronix)

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Re: RISC-V

Tue Jan 08, 2019 10:25 am

Gavinmc42 wrote:
Tue Jan 08, 2019 12:31 am
I don't think RPF have to worry about someone making a better Pi from a FPGA and a bunch of blocks from OpenCore.
But cool if someone did ;)
What is interesting me is the possibility of doing FGPA stuff on Pi's as well all the normal coding.
That IceStudio FPGA visual IDE worked on my Linux Mint, not sure why it does not on my Pi yet.

If that FPGA stuff includes cpu cores then a big bonus for learning how they are made.
Settle that argument which was better Z80 or 6809? :D
$1 FPGA's that can do cpu stuff :o $8 ones that can do neural network vision recog :shock:

As Donald Knuth wrote in one of his prefaces, (Art of Computer Programming - 4A) , "advances in computing are coming from algorithm improvements." x86, Arm, RISC-V they can all only go so fast.
RISC-V saves power and real estate so they can put more on the die but there is a limit.
Intel, IBM have learned the hard way, complexity can making debugging impossible.

Since Neural networks have been found to work with 8 bit data, perhaps we will see 10,000 core 8 bit cpus?
Who knows? The best AI cpu could be invented on a fpga programmed by a Pi.
Why stick with 8,16,32,64 bits cpu's, why not try 9bit trinary cpu's?

But for FPGA cpu RISC-V is a good place to start.
Distributed Processing, IoT style requires lots of cpus, orders of magnitudes more cpu's than we have on the planet now?
Can a cpu be made for $0.01?

Wow, semi rhetorical question, IBM down to 10cents :o
https://www.digitaltrends.com/computing ... uter-salt/
Wonder if they are RISC-V based?

Not withstanding the as usual almost imcomprehensible brain dump (do you ever read your posts to see if they make sense?)...

All processor architectures take about the same amount of die space for the same amount of performance, given equally competent dev teams. So an ARM with the same performance as an x86 will take about the same amount of die space assuming the same process node.

So a RISV-V with the same performance as an ARM will take about the same die area.

And no, you cannot really make a working CPU for $0.01.
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Re: RISC-V

Tue Jan 08, 2019 10:37 am

jamesh
And no, you cannot really make a working CPU for $0.01.
But you can buy a working micro-controller for $0.03.
"3 CENT Micro LED Blinky with ICE!" : https://www.youtube.com/watch?v=Rixo78hv_lw

I do wonder what the manufacturing cost was...

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Re: RISC-V

Tue Jan 08, 2019 10:57 pm

Thanks Heater, $0.03 is close enough ;)
Reminds me a little of early Pic's.
1KW memory, not 1KB so perhaps not 8 bit instructions.
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self-developed in order to make sure whole technology can be fully grasped. Therefore, it’s available to provide better design performance and programming flexibility issues which can supply perfect solution and meet inquiry from customer timely.
As understandable as my brain dumps? Which I do re-read, mostly to check spelling.

Padauk their own design micros and instruction set?
The MSC11 with FFPA is a multicore RISC chip?
Padauk could make RISC-V chips?

It did get me questioning, is RISC-V in China?
Now that China basically controls ARM, it is interesting their recent attention to RISC-V.
All processor architectures take about the same amount of die space for the same amount of performance, given equally competent dev teams. So an ARM with the same performance as an x86 will take about the same amount of die space assuming the same process node.
So a RISV-V with the same performance as an ARM will take about the same die area.
I had assumed the silicon die area of the RISC-V is smaller than an equal power ARM core which makes RISC-V more economical even without royalties.
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Re: RISC-V

Tue Jan 08, 2019 11:13 pm

This thread has got me wondering if perhaps Raspberry Pi could, instead of using RISC-V as the core of a product, release a product to help folk develop RISC-V systems. Just an idea. It will certainly be interesting to see where they go with this one.

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Re: RISC-V

Wed Jan 09, 2019 12:12 am

andrum99 wrote:
Tue Jan 08, 2019 11:13 pm
This thread has got me wondering if perhaps Raspberry Pi could, instead of using RISC-V as the core of a product, release a product to help folk develop RISC-V systems.
That's what made me hope there could be a RISC-V HAT arriving some time soon. The Lowrisc guys and the Foundation are probably close, formally or informally, a HAT with some RISC-V chip ( or FPGA ) on it would make sense, and RPT would probably need to join the RISC-V foundation to sell under the "RISC-V" name.

If a TV HAT can get video output through a Pi to HDMI then a RISC-V chip on a HAT can do the same, and be controlled from a Pi, so it doesn't have to be more than a chip on a HAT. The rest is just [sic] software; development tools and runtime integration. Entirely feasible.

Of course; that's all speculative. If it's not planned I would hope it could be, something they might like to discuss between themselves. It would be an ideal way for the Lowrisc guys to get RISC-V hardware out there, in the public arena, into developer's hands, and I am sure there would be benefit for RPF.

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Re: RISC-V

Wed Jan 09, 2019 12:34 am

This thread has got me wondering if perhaps Raspberry Pi could, instead of using RISC-V as the core of a product, release a product to help folk develop RISC-V systems.
With Pi's and Microbit's the education market for cpu coding is covered.
Chip designing with FPGA's is a market that is new to me, mostly ignored till now because of tools and pricing.
Seems to be plenty of low volume, hacker FPGA type hats around.

A Zero size/cost PCB with a FPGA that can do RISC-V, will probably shake up the market somewhat.
Since the Pi came out the SoC market got a big shake up, all those clones popped up but did they damage Pi sales?
Would a small low cost, easy to use and understand fpga pcb have a similar market take up?

Teaching coding is not the same as teaching logic, but teaching cpu design as a bonus :D
RPF's mission is to teach the next gen of coders, can it be extended a little to teach chip designers?

All those coders cannot wait for faster cpus to come out to run their bloated code.
The next Pi is not going to be 2 times existing 1.4GHz or probably much more than 1GB.
Now if the FPGA can do RISC-V we can all get familiar with coding them before the Pi-V RISC-V board is available.

Wonder if the Transputer chip is Opencore yet?
I was never able to afford every cpu architecture computer to try them all.
Perhaps a RPF FPGA board can be used in history classes? :lol:

Study al those old cpu's and come up with something even better than RISC-V?
Diversity is good, walled off eco systems may look pretty but can die out quickly.
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Re: RISC-V

Wed Jan 09, 2019 11:20 am

Gavinmc42 wrote:
Wed Jan 09, 2019 12:34 am
Would a small low cost, easy to use and understand fpga pcb have a similar market take up?
There is more to it than merely providing a cheap PCB or HAT with an FPGA on it.

For mass take-up one needs software tools which are easy to install, configure and use, good documentation, tutorials and support, for using the tools, the hardware, and achieving results.

FPGA-based development is a niche area and currently has a quite steep learning curve, and historically a rather high entry cost. Riding the Next Big Thing wave, providing a click-and-go means of having RISC-V running in an FPGA, would encourage people to buy into that. Having good software and support with that would encourage people to go further, would make it easier for them to do so.

Easing entry would allow more people to go through the door, but whether they would is an unknown. There are certainly people interested in RISC-V and/or FPGA use who would love to get their hands on such a thing and others who may become interested enough to do so given the right tools at the right price, software, support and encouragement to join in the fun.

I believe such a thing would have merit and be worthwhile, would fit within the RPF's remit, but I cannot say whether there's a good business case for it or not.

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Re: RISC-V

Wed Jan 09, 2019 12:21 pm

For mass take-up one needs software tools which are easy to install, configure and use, good documentation, tutorials and support, for using the tools, the hardware, and achieving results.
Have you tried Icestudio yet, sure it is pretty basic and no drop and drag RISC-V, but it shows promise.
Scratch for logic chips? The last time I did text VHDL was some time in 1980's?

Wish I had more time but I'm busy with my latest toys, PSoC6 proto kits, 2 x cpu's, PLDs + bluetooth 5.0 ;)
Cypress PSoCs have on chip PLD but you don't need to know VHDL to use them.
Cypress finally have Linux tools :D No RISC-V yet, wonder if ? F-RAM FPGAs?

Hopefully google will find this post in 6 months to remind me to look again at RISC-V + FPGA ;)
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Re: RISC-V

Sun Jan 13, 2019 12:52 am

I treated myself to a post-Christmas Prezzie and got myself a 64GB SD card, tried again with Clifford Wolf's instruction, alas, a couple of hours or so later and another circle of hell entered ...

Code: Select all

:::
fi > tmp-fixinc_list
/bin/bash ../../../riscv-gcc/gcc/../move-if-change tmp-fixinc_list fixinc_list
echo timestamp > s-fixinc_list
g++ -no-pie   -g -O2 -DIN_GCC  -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -f$
      cp/cp-lang.o c-family/stub-objc.o cp/call.o cp/class.o cp/constexpr.o cp/$
g++ -no-pie   -g -O2 -DIN_GCC  -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -f$
  cc1-checksum.o libbackend.a main.o libcommon-target.a libcommon.a ../libcpp/l$
g++ -no-pie   -g -O2 -DIN_GCC  -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions -f$
        lto/lto-lang.o lto/lto.o lto/lto-object.o attribs.o lto/lto-partition.o$
collect2: fatal error: ld terminated with signal 9 [Killed]  
compilation terminated.
../../../riscv-gcc/gcc/cp/Make-lang.in:120: recipe for target 'cc1plus' failed
make[2]: *** [cc1plus] Error 1
make[2]: *** Waiting for unfinished jobs....
rm cpp.pod gcov-dump.pod gcov.pod gpl.pod gfdl.pod gcov-tool.pod gcc.pod fsf-fu$
make[2]: Leaving directory '/home/pi/riscv-gnu-toolchain-rv32i/build/build-gcc-$
Makefile:4261: recipe for target 'all-gcc' failed
make[1]: *** [all-gcc] Error 2
make[1]: Leaving directory '/home/pi/riscv-gnu-toolchain-rv32i/build/build-gcc-$
Makefile:415: recipe for target 'stamps/build-gcc-newlib-stage1' failed
make: *** [stamps/build-gcc-newlib-stage1] Error 2
I have no idea why 'ld' got terminated; I had just left it running. It's eaten up 5.6GB since starting but plenty free. Out of memory ? I don't know. Another one to add to the ever growing 'didn't work' list.

Does anyone have instructions for building any RISC-V compiler on a Pi 3B which they know works, or have pre-built binaries to share ?

Heater
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Re: RISC-V

Sun Jan 13, 2019 2:55 am

I suspect it was killed by an out of memory error.

A big build like that will need swap space.

The way I have done that in the past is to provide swap space on an NFS mount from a directory on my PC that was in turn a RAM based file system.

Be sure you are not using parallel make to build this.

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Re: RISC-V

Sun Jan 13, 2019 4:17 am

Does anyone have instructions for building any RISC-V compiler on a Pi 3B which they know works, or have pre-built binaries to share ?
I assume you tried this on Raspbian?
It worked on Gentoo64, but that I think is because Sakaki has put a big zram on it for doing these big compiles.
The binary will be no good for you as it was compiled for Aarch64.

I made the complete tool set, hopefully there is a way to make a smaller set that does not take 13 hours ;)
Baremetal GCC or Linux version for RISC-V?
And I am not even sure if it made the compilers or just installed all the sources, whatever it is, there is 12.7GB of it.

There is a folder called RISC-V-gcc that looks like the compiler source.
I will start there and once I have a Arm cross compiler for my Aarch64 Pi I will muddle through and see if I can compile it.
I need Aarch64 cross compiler for ARMs anyway for Arduino stuff.

Is there a llvm/Clang version, gcc is big.
Someone must have done one by now?
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Re: RISC-V

Sun Jan 13, 2019 11:45 am

While trying to manually install the latest 3.3.1 Free Pascal on my Gentoo64 Pi I noticed there are riscv, riscv32, riscv64 compiler src options.
I will need to learn how to make compilers with free pascal,but the sources and Lazarus IDE are only 1.2GB
These are snapshots so I think files are missing :(
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Re: RISC-V

Sun Jan 13, 2019 5:43 pm

Heater wrote:
Sun Jan 13, 2019 2:55 am
Be sure you are not using parallel make to build this.
How do I ensure that ? Presumably -j1 rather than -j$(nproc). I simply followed the instructions given on the developer's page.

Perhaps an alternative question to ask is if anyone knows of some other cross-compiler which can create RISC-V object code on a Pi which isn't GCC, is more lightweight and therefore more likely to build on a Pi ?

I appreciate GCC is probably very capable, more than 'just a compiler', but it seems extremely bloated. I am used to C and other compilers 'fitting on a floppy disk', not having half a gig of binaries, not being a 12GB build, and not taking half a day to get built, if that ever succeeds.

For example, I just downloaded and built VBCC and the tools to allow me to create Videocore IV executables from C and that took two minutes and used 5MB of disk space. MicroPython was a little more demanding. Downloading and building took six minutes and used 270MB.

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Re: RISC-V

Mon Jan 14, 2019 12:01 am

hippy wrote:
Sun Jan 13, 2019 5:43 pm
Heater wrote:
Sun Jan 13, 2019 2:55 am
Be sure you are not using parallel make to build this.
Presumably -j1 rather than -j$(nproc).
Many thanks for that very useful hint. It now seems to have built. I at least have a "/opt/riscv32i" directory and running the compiler on a 'deliberately won't compile' program gives -

Code: Select all

pi@Pi3B:~$ /opt/riscv32i/bin/riscv32-unknown-elf-gcc xyzzy.c
xyzzy.c: In function 'main':
xyzzy.c:4:3: warning: implicit declaration of function 'printf' [-Wimplicit-func
tion-declaration]
   printf("Yay!");
   ^~~~~~
And when not malformed, I get the expected 'a.out'. So for anyone following along, my version of the instructions from Clifford Wolf's site - https://github.com/cliffordwolf/picorv32

Code: Select all

cd ~
sudo apt-get install autoconf automake autotools-dev bc bison \
                     build-essential curl flex gawk git gperf \
                     libexpat1-dev libgmp-dev libmpc-dev \
                     libmpfr-dev libtool patchutils texinfo \
                     zlib1g-dev 

sudo mkdir /opt/riscv32i
sudo chown $USER /opt/riscv32i

git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-rv32i
cd ~/riscv-gnu-toolchain-rv32i
git checkout c3ad555
git submodule update --init --recursive

mkdir build
cd build
../configure --with-arch=rv32i --prefix=/opt/riscv32i
make -j1
Build time about 7 hours on a Pi 3B, 7GB disk space for the tool chain, about 630MB for the binaries. That's just for the 'rv32i' variant.

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Re: RISC-V

Mon Jan 14, 2019 12:17 am

This compiler issue got me interested, thank goodness for googles.
The reference guide seems to be Jack Chenshaw's.
Lot of people have used the guide to make a compiler in many languages.

Diy compiler for a RISC-V on a FPGA, all done on a Pi.
Learning how to make a compiler would come in handy when going to the next stage of designing a cpu on a fpga.
Then invent a diy langauge for a diy cpu on fpga?
The learning does not stop ;)
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Re: RISC-V

Mon Jan 14, 2019 12:18 am

jamesh wrote:
Tue Jan 08, 2019 10:25 am
And no, you cannot really make a working CPU for $0.01.
That isn't what these people claim (though I'll freely admit I have no idea if they suceeded) - http://armdevices.net/2017/05/21/0-01-f ... pragmatic/
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Re: RISC-V

Mon Jan 14, 2019 3:20 am

If you put 100 cpu's on a $1 fpga, does that count?
What is the smallest cpu core? Intel 4004?
Could the QPU's in the VC4 be made on a FPGA?

4bit instructions, 8bit data, enough to do Neural networking stuff?
More fun if it can all be done on a Pi :D
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Heater
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Re: RISC-V

Mon Jan 14, 2019 5:51 am

Gavinmc42,
The reference guide seems to be Jack Chenshaw's.
You mean Jack Crenshaw: "Let's Build a Compiler" : https://compilers.iecc.com/crenshaw/
Lot of people have used the guide to make a compiler in many languages.
Including me. Ten or so years ago I read that and built a compiler, in C, as I went along. My compiler was for a language of my own devising but basically a simple C/Pascal/Algol like language. Never did get around to adding support for strings, structs and pointers. It ended up generating code for both x86 and the Parallax Propeller MCU, no optimizations what so ever. I was just amazed that I could build a compiler at all!
Diy compiler for a RISC-V on a FPGA, all done on a Pi.
The thought did cross my mind to get back to my Crenshaw compiler and add RISC V code generation.
Learning how to make a compiler would come in handy when going to the next stage of designing a cpu on a fpga.
Then invent a diy langauge for a diy cpu on fpga?
Exactly, I need a compiler for my humble RISC V effort: https://github.com/ZiCog/sodor-spinal

Per Vognsen has been doing exactly that in his "bitwise" series on building a computer from scratch. Including creating a RISC V core, writing your own compiler, even creating your own hardware description language:
https://www.youtube.com/playlist?list=P ... wMSDM3aTtX
https://github.com/pervognsen/bitwise/

To kick off that series he goes through the designand writing of a compiler for a C like language "Ion". Ion is as powerful as C but has some syntactic changes to make it easier to parse.
The learning does not stop
Hopefully not, but judging by your posts you have 10,000 things lined up to learn and keep discovery new things to add to the list every day. As you keep flitting from one to the other when will you learn any of them?

I might suggest picking one thing and sticking to it for a while.

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