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by msperl
Wed Nov 20, 2013 3:18 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: CAN controller
Replies: 813
Views: 339030

Re: CAN controller

Look here: https://libbits.wordpress.com/2012/05/22/socketcan-support-in-python/ But the problem is that raspbian only ships with python 2.7 and 3.2, while you would need 3.3 (+patch)... You may compile the latest version of python yourself - not that complicated - and then you can probably use it. ...
by msperl
Fri Nov 15, 2013 11:36 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Using Pi as i2c slave device?
Replies: 9
Views: 5362

Re: Using Pi as i2c slave device?

In principle there is support for BSC(=I2C like)/SPI slave in the HW (see page 160 in the peripherals document) After quick scanning the pages, it seems it would require the use of: GPIO18,19,20 and 21 for slave SPI GPIO18 and 19 for slave I2C But only GPIO 18 is available on the RPI, so there is no...
by msperl
Mon Nov 11, 2013 10:16 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

P.s: the next devices I will try are an SD-Card via SPI and a Display (taking notros device driver) - that will probably handle most typical "use-cases"...
by msperl
Mon Nov 11, 2013 10:14 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

Good news! The enc28j60 is also working with the "patched" driver - so the CS-"glitches" were responsible for the not-functioning driver. The problem of unloading the mcp2515 driver under high load still persist - this may relate to the new locking scheme in place now in preparation for the "pipelin...
by msperl
Mon Nov 11, 2013 9:07 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

I believe I can confirm that this CS glitch is a HW issue - a simple setting CLEAR_TX_FIFO in a loop without DMA also shows the "behavior" of the issue - CS gets de-asserted and reasserted also in about 4% of all "events". But there is a work-around that is a bit of a hack: making use of the reserve...
by msperl
Mon Nov 11, 2013 6:23 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Erata in BCM2835 (SoC) Datasheet?
Replies: 16
Views: 2599

Re: Erata in BCM2835 (SoC) Datasheet?

This is why I suggested creating a documentation repository on Github to collate the information gathered from the myriad posts on this forum - I2S/I2C/SPI have received the most attention and as such there are forum posts describing the hardware interaction quite well. If there is impetus among th...
by msperl
Mon Nov 11, 2013 4:59 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Erata in BCM2835 (SoC) Datasheet?
Replies: 16
Views: 2599

Re: Erata in BCM2835 (SoC) Datasheet?

Well, I am trying to pipeline DMAs - especially Writes then Reads. As DMA does 32 bit only it works perfectly as long as the number of bytes are multiple of 4. If not then I need to do Clear RX and TX - as the "DLEN" is not "honoured" in this case really from the FIFO perspective. If I write 3 Bytes...
by msperl
Mon Nov 11, 2013 2:47 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Erata in BCM2835 (SoC) Datasheet?
Replies: 16
Views: 2599

Re: Erata in BCM2835 (SoC) Datasheet?

I wouldn't really call this "errata" - more like behaviour in edge cases that certainly wouldn't have been beaten out of the hardware before the documentation was written. Given that the Pi is now being used with an entire ecosystem of devices, I would say that having a formally updated datasheet /...
by msperl
Mon Nov 11, 2013 10:04 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Erata in BCM2835 (SoC) Datasheet?
Replies: 16
Views: 2599

Re: Erata in BCM2835 (SoC) Datasheet?

OK - I ran it like this without DMA: writel(BCM2835_SPI_CS_TA,bs->regs+BCM2835_SPI_CS); for(err=0;err<100000000;err++) { writel( BCM2835_SPI_CS_TA /* enable Transfer */ | BCM2835_SPI_CS_CLEAR_RX /* clear RX buffers */ | BCM2835_SPI_CS_CLEAR_TX /* clear TX buffers */ ,bs->regs+BCM2835_SPI_CS); } writ...
by msperl
Mon Nov 11, 2013 9:31 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Erata in BCM2835 (SoC) Datasheet?
Replies: 16
Views: 2599

Re: Erata in BCM2835 (SoC) Datasheet?

I think this thread moved more to a "wishlist" thing. Still - I got some strange observations that I would like confirmed if possible. The observation is that in SPI_CS (07R204000) TA and DMAEN are enabled if I now write to SPI_CS TA|CLEAR_RX|CLEAR_TX (and DMAEN as well, but it does not make a diffe...
by msperl
Mon Nov 11, 2013 9:09 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

Quick analysis: after waiting WAIT cycles in DMA it shows the error is related to the fact that under some circumstances (or for an ever so short "time" not always measurable by me) the CS goes high when resetting the TX/RX FIFOs to 0. This might be related to the write to CS itself, or it may be re...
by msperl
Mon Nov 11, 2013 7:51 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

Some investigations: I am no 100% sure if the issue happens because of one of the later code changes, or if it was always there, but error handling in the mcp2515 driver only came a bit later an is now also showing "issues" from time to time. In one sample it seems as if in 7291 out of 170529 cases ...
by msperl
Sat Nov 09, 2013 12:57 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Can't get SPI devices
Replies: 21
Views: 21022

Re: Can't get SPI devices

I believe it may be related to the fact that at least in some kernel branches there is a bug in the board-config of the kernel and as such no device is configured for SPI. You can easily check with the "original" kernel via: ls -la /sys/bus/spi/devices/ This directory is most likley empty. If you bo...
by msperl
Fri Nov 08, 2013 10:31 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

I have been trying to get the enc28j60 to work with my new driver, but for some reason it does not work. Even during the initialization phase it fails. Unfortunately my logic analyzer is failing to show anything suspicious. I start to fear that there is some chipselect glitch where CS goes up moment...
by msperl
Wed Nov 06, 2013 1:43 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: ENC28J60 SPI Ethernet
Replies: 33
Views: 52414

Re: ENC28J60 SPI Ethernet

For those of you who try to use this device with a current kernel: you will need to configure the interrupt edge outside of the driver. If you use spi-config to configure the SPI-parts (see: http://www.raspberrypi.org/phpBB3/viewtopic.php?f=44&t=57157), then assuming you have: the IRQ line on GPIO 2...
by msperl
Tue Nov 05, 2013 9:50 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: CAN controller
Replies: 813
Views: 339030

Re: CAN controller

Seems as if there is an issue with acknowledging the packet due to different bit-timings - missing BUS-termination? Never seen such a behavior - unless you have only one device on the bus or two, but one is in "listen only mode" and the transmitting one is not set for one-shot mode. (Note: one-shot-...
by msperl
Mon Nov 04, 2013 4:14 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

Here to Images that show what I have suspected before: The different lines without preparing statements: no_prepare.png While with prepared statements: prepare.png Both sow the first CAN Frame read from a sequence of 5 Frames. It also shows the end of the first frame (with Int-line going down) till ...
by msperl
Mon Nov 04, 2013 1:45 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: CAN controller
Replies: 813
Views: 339030

Re: CAN controller

SPI-Driver update: Driver has been updated with a "future" feature from the 3.14 kernel called spi_prepare_messages. This result in a drop of CPU utilization from 88% down to 80% CPU Utilization. Also with the new interface only 57 out of 3283 packets are delivered from the 2nd hardware buffer. Whil...
by msperl
Mon Nov 04, 2013 1:35 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: CAN controller
Replies: 813
Views: 339030

Re: CAN controller

To get mcp2515 + SPIDEV working, you will have to configure the second SPI device as SPIDEV device with your preferred speed, mode,... For that you need to add the following to the Parameter of spi-config typically: ",bus=0:cs=1:speed=500000:modalias=spidev" You can also configure an SD Card(mmc), A...
by msperl
Mon Nov 04, 2013 1:23 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

Status-update on spi-bcm2835dma: The driver has now the first implementation of the spi_prepare_message interface that will go live with linux 3.14. So it is currently a bit of a "hack" getting it in place without any updates to the spi infrastructure. Also the drivers which want to make use of it h...
by msperl
Mon Nov 04, 2013 10:35 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Erata in BCM2835 (SoC) Datasheet?
Replies: 16
Views: 2599

Re: Erata in BCM2835 (SoC) Datasheet?

Actually for this thread I was mostly hoping for an update of the SOC-document itself, so that it can get used as a reference. Ok - there is the "end-user" maintained errata-wiki page, but is that really authoritative? Does everyone know about this? I did not for example! Also it is not linked in th...
by msperl
Mon Nov 04, 2013 5:15 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: SPI driver latency and a possible solution
Replies: 241
Views: 135529

Re: SPI driver latency and a possible solution

There is a newer version that should be able to handle 4GB of transfers in one go - probably even more... Still you will need to "chunk" the spi_message into blocks (chained spi_transfers of say up to 4k), which still are sent with CS enabled as one big sequence. (the old DMA driver does not support...
by msperl
Sun Nov 03, 2013 12:06 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: Erata in BCM2835 (SoC) Datasheet?
Replies: 16
Views: 2599

Re: Erata in BCM2835 (SoC) Datasheet?

Hi! Does the Foundation and Broadcom have to say anything on this subject of errata in the existing SOC documentation? Maybe even opening up some more on the supported devices side? There should be some means for programming the DSI/CAM device from the ARM side, so that they could get used for some ...
by msperl
Thu Oct 31, 2013 4:22 pm
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: CAN controller
Replies: 813
Views: 339030

Re: CAN controller

Take the ones that Gert has been providing and zeta is about to package. Then it should work fine. But I believe it is more of an issue of what is happening on the CAN-bus itself... Do you have an oscilloscope available? Connect our device to the CAN board and then look with your oscilloscope on the...
by msperl
Wed Oct 30, 2013 6:00 am
Forum: Interfacing (DSI, CSI, I2C, etc.)
Topic: CAN controller
Replies: 813
Views: 339030

Re: CAN controller

117M CAN messages and 10 hours later the system still works like a charm @8MHz SPI Bus without Packet loss. Below that BUS Speed it produces overruns (and also overruns that are NOT detected...). I will now go to get the mcp2515a driver working before working on the "pipelining" of DMA transfers... ...

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