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by Ultibo
Thu Apr 11, 2019 12:30 am
Forum: Bare metal, Assembly language
Topic: Alignment issues in porting CSUD for RPI 3B (32 Bit) with minimal changes
Replies: 45
Views: 2116

Re: Alignment issues in porting CSUD for RPI 3B (32 Bit) with minimal changes

I checked mouse has only 1 configuration , 1 interface and only 1 endpoint (that should be endpoint 0). I tried fetching interface descriptor and it was successful. I tried fetching endpoint descriptor for endpoint 0 and again it resulted in stall error. Here in circle code https://github.com/rsta2...
by Ultibo
Thu Mar 14, 2019 9:39 am
Forum: Bare metal, Assembly language
Topic: RPI3 QEMU
Replies: 50
Views: 34070

Re: RPI3 QEMU

... I see you also have a Generic Timer workaround in place. It isn't really a workaround, more of an option for those that need it. We use the Generic Timers to drive the scheduler on each core (similar to what you were wanting to do here ) but we also include an option to use the System Timer for...
by Ultibo
Thu Mar 14, 2019 9:34 am
Forum: Bare metal, Assembly language
Topic: Creating a bootloader that writes to CPUACTLR?
Replies: 8
Views: 2272

Re: Creating a bootloader that writes to CPUACTLR?

It means using kernel_old=1 in config.txt to pick the ARM up raw at 0x0 doing all the stuff in armstub7.s with your new code and then booting into what would have been the original kernel8-32.img. That won't help because kernel_old=1will disable the device tree loading by the firmware and the Linux...
by Ultibo
Tue Mar 12, 2019 10:48 pm
Forum: Bare metal, Assembly language
Topic: RPI3 QEMU
Replies: 50
Views: 34070

Re: RPI3 QEMU

... Assuming qemu could emulate the BCM System Timer, what other peripherals are needed to boot bare metal projects like Circle, Ultibo... We took the opposite approach, instead of waiting for QEMU to emulate a Raspberry Pi we added QEMU support to Ultibo. The advantage of this approach is that we ...
by Ultibo
Wed Mar 06, 2019 6:35 am
Forum: Bare metal, Assembly language
Topic: CNTP interrupt not firing
Replies: 38
Views: 1834

Re: CNTP interrupt not firing

I know you have running code so that makes me think there is another clock I haven't found so could you outline your register setup to run from 19.2Mhz because I have definitely only found 38.4Mhz so far. QA7_rev3.4.pdf page 9 Section 4.2 Control register Bit 8: Core timer clock source If clear the...
by Ultibo
Thu Feb 28, 2019 10:56 pm
Forum: Bare metal, Assembly language
Topic: CNTP interrupt not firing
Replies: 38
Views: 1834

Re: CNTP interrupt not firing

Every higher priority level have more timeslices than the one beneath, and the top 3 levels are uninterruptible, meaning when the IRQ handler is executed, it won't call the scheduler Hi bzt, What is your rationale for choosing to make the top 3 priority levels uninterruptible? Why not (as we do in ...
by Ultibo
Thu Feb 28, 2019 10:44 pm
Forum: Bare metal, Assembly language
Topic: Circle - C++ bare metal environment (with USB)
Replies: 175
Views: 42741

Re: Circle - C++ bare metal environment (with USB)

Circle 39 has been released today with support for the following accelerated graphics APIs: OpenGL ES 1.1 and 2.0 OpenVG 1.1 EGL 1.4 Dispmanx I have partially ported the userland code to realise this. Congratulations Rene, We know how much work is required to produce a complete implementation of th...
by Ultibo
Thu Jan 31, 2019 1:33 am
Forum: Bare metal, Assembly language
Topic: Updated revision information for CM3+
Replies: 3
Views: 664

Re: Updated revision information for CM3+

Excellent, thank you!
by Ultibo
Tue Jan 29, 2019 11:29 pm
Forum: Bare metal, Assembly language
Topic: Updated revision information for CM3+
Replies: 3
Views: 664

Updated revision information for CM3+

Hi, Just a prompt for someone with the relevant information available (James ?) to update the Revision codes page on GitHub with the latest information for the new CM3+ Assuming that everything else can be determined from the schematic and the device tree data, the revision code should be all that i...
by Ultibo
Sun Jan 20, 2019 10:56 pm
Forum: Bare metal, Assembly language
Topic: run from 0x00800000 (pi zero w)
Replies: 6
Views: 1439

Re: run from 0x00800000 (pi zero w)

Mods this probably need to move to a linux forum because clearly it requires linux to give execute permissions to the memory block he wants to run the code in which emil correctly notes above. Not sure how you reach the conclusion that this requires Linux, if you enable the MMU you can apply whatev...
by Ultibo
Thu Dec 20, 2018 9:30 am
Forum: Bare metal, Assembly language
Topic: Low voltage detection, read voltage level
Replies: 2
Views: 927

Re: Low voltage detection, read voltage level

Any idea on how to retrieve this in bare metal would be much appreciated. Hey Schnoogle, I'm not sure if the GPIO35 stuff is actually still valid, so far never found a way to make use of it for low voltage detection. The current way that Raspbian does it seems to be by using a fairly recent mailbox...
by Ultibo
Thu Dec 13, 2018 11:31 pm
Forum: Bare metal, Assembly language
Topic: CSUD - Chadderz's Simple USB Driver (Source)
Replies: 56
Views: 16526

Re: CSUD - Chadderz's Simple USB Driver (Source)

I already have used interrupts. There are ever a register to enable, to disable, to know the source and to clear the irq pending. Searching BCM2837 datasheet I could not find any register to clear USB interrupt. Is there any one? Tks The documentation for the USB host in the Pi has never been made ...
by Ultibo
Wed Dec 12, 2018 12:24 am
Forum: Bare metal, Assembly language
Topic: Pi 3B+ Activity LED
Replies: 23
Views: 7692

Re: Pi 3B+ Activity LED

Did they change it from pin 29 to something else? bits 9,10,11 are gpio 23 and my other code would need to change to 23 as well... No, there has been no change. Even the new 3A+ is still pin 29 so your code is correct. What am I not understanding? I think someone is confusing GPSET/GPCLR which are ...
by Ultibo
Wed Nov 14, 2018 10:52 pm
Forum: Bare metal, Assembly language
Topic: information of bcm2835 mailbox and doorbell
Replies: 6
Views: 2092

Re: information of bcm2835 mailbox and doorbell

If I want to clear the doorbell interrupt and get the message from VideoCore, I need to read it in VCHIQ_DOORBELL_BELL0(0x3f00b840). If I want to send the message to VideoCore, I need to write the message to VCHIQ_DOORBELL_BELL2(0x3f00b848). Is this right? Yes that's correct but only in the context...
by Ultibo
Sat Nov 10, 2018 10:57 pm
Forum: Bare metal, Assembly language
Topic: information of bcm2835 mailbox and doorbell
Replies: 6
Views: 2092

Re: information of bcm2835 mailbox and doorbell

But I could not find any useful information about the bcm2835-doorbell in its documentations: https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2835/BCM2835-ARM-Peripherals.pdf https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf After the test, I fo...
by Ultibo
Wed Sep 12, 2018 11:47 pm
Forum: Bare metal, Assembly language
Topic: Taking exception 3 [Prefetch Abort]
Replies: 12
Views: 3950

Re: Taking exception 3 [Prefetch Abort]

I figured out the exception occurs in the mmu_init function with the last call setting the sctlr_el1 register.I believe the memory to all be readable and executable so I'm not sure what the problem is. If the exception happens immediately after enabling the MMU it would tend to indicate that someth...
by Ultibo
Tue Sep 11, 2018 11:50 pm
Forum: Bare metal, Assembly language
Topic: Taking exception 3 [Prefetch Abort]
Replies: 12
Views: 3950

Re: Taking exception 3 [Prefetch Abort]

I would like to find this bug myself so the information may be a bit vague ask for clarification if it is needed. Yes, the only way to truly understand what is happening is to work it out yourself, no matter how painful and tedious that may be ;). I'm not sure yet exactly what this error means but ...
by Ultibo
Sun Sep 09, 2018 11:26 pm
Forum: Bare metal, Assembly language
Topic: Reasons behind MMIO base address
Replies: 3
Views: 926

Re: Reasons behind MMIO base address

I am curious as to why they didn't just start the MMIO at 0x40000000? What we have learned from snippets of information provided over the years is that the VC4 GPU only supports a 1GB address space (which is the reason why the Pi cannot have more than 1GB) and because the GPU needs access to the pe...
by Ultibo
Wed Aug 29, 2018 10:10 am
Forum: Bare metal, Assembly language
Topic: Multiple GPU hardware layers?
Replies: 4
Views: 1331

Re: Multiple GPU hardware layers?

I know we can request 1 frame buffer at various virtual sizes through the mailbox interface, but is there a way to get multiple hardware layers from the GPU? With hardware layers I mean multiple frame buffers displayed by the GPU on top of each other with alpha transparency. The interface you are a...
by Ultibo
Mon Aug 13, 2018 11:37 am
Forum: Bare metal, Assembly language
Topic: Xinu release
Replies: 21
Views: 4049

Re: Xinu release

LizardLad_1 wrote:
Sat Aug 11, 2018 4:19 am
Are you going to release the code on GitHub or GitLab?
Maybe neither, it seems the original authors of Xinu already have.

http://reu.mscs.mu.edu/index.php/Upgrad ... berry_Pi_3
https://dl.acm.org/citation.cfm?id=3162 ... CM&coll=DL




.
by Ultibo
Tue Jun 19, 2018 12:34 am
Forum: Bare metal, Assembly language
Topic: Raspberry Pi 3B+ Bare Metal USB Driver
Replies: 41
Views: 4646

Re: Raspberry Pi 3B+ Bare Metal USB Driver

I also noticed one more thing. After waiting a few minutes for all the devices to be attached, it shows that there are 2 LAN7515 hubs... 1 = roothub 2 = LAN hub 3 = is also LAN hub..?? 4 = ethernet device 5 = mouse Hi rlatinov, The Pi3B+ has two hubs built into the LAN7515 device, this is normal an...
by Ultibo
Tue Jun 12, 2018 4:54 am
Forum: Bare metal, Assembly language
Topic: [Partly-Solved] VCHIQ/MMAL Camera access
Replies: 28
Views: 3002

Re: [Partly-Solved] VCHIQ/MMAL Camera access

But to answer your question, there is no specific initialization for the spinlock/mutex necessary to be called before they can be used. Alas, the particular case I was thinking of only applies if your lock structures (spin/mutex) require initialization before use. VCHIQ just did not respond to the ...
by Ultibo
Sun Jun 10, 2018 11:48 pm
Forum: Bare metal, Assembly language
Topic: Baking Pi issues
Replies: 8
Views: 1367

Re: Baking Pi issues

I just got a Raspberry Pi 3 B+ and wanted to do the Baking Pi tutorial http://www.cl.cam.ac.uk/projects/raspberrypi/tutorials/os/ok01.html After having some issues i discovered this thread https://www.raspberrypi.org/forums/viewtopic.php?t=82871 and did exactly the same but it doesnt work for me. I...
by Ultibo
Fri Jun 08, 2018 12:09 am
Forum: Bare metal, Assembly language
Topic: [Partly-Solved] VCHIQ/MMAL Camera access
Replies: 28
Views: 3002

Re: [Partly-Solved] VCHIQ/MMAL Camera access

This would usually trigger the VCHIQ callback which is forwarded into MMAL with reason VCHIQ_MESSAGE_AVAILABLE that does check the returned messageID to be MMAL_WORKER_BUFFER_TO_HOST and than triggers the VCHIQ_BULK_RECIEVE. But this initial callback from VCHIQ, once the buffer has been passed is n...
by Ultibo
Mon Jun 04, 2018 2:27 am
Forum: Bare metal, Assembly language
Topic: [Partly-Solved] VCHIQ/MMAL Camera access
Replies: 28
Views: 3002

Re: [Partly-Solved] VCHIQ/MMAL Camera access

Hey Schnoogle, I've the MMU setup with L1 caching active. I've no clue how to get L2 caches setup but the disable_l2cache switch in the confog.txt should deactivate it in GPU anyway if I understood it correct. Based on that I'd suggest that the disable_l2cache/enable_l2cache setting is at best irrel...

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